Job Description

Our client is the backbone for the design of semiconductors and is helping to accelerate technology around the world.  As the hands down leader in EDA, they are public and one of the best places to work in the Bay Area.



  • Responsible for implementing and verifying high performance RTL IP on FPGA prototyping hardware platform.



  • Expert level RTL coding technique for high speed design in FPGA
  • Timing analysis and design optimization
  • FPGA design using Gigabit transceivers
  • FPGA design bringup and debug on hardware


Position logistics:

  • 6 Months Contract
  • Local candidates strongly preferred


About the Client:

For more than 25 years, this client has been at the heart of accelerating electronics innovation with engineers around the world having.  Their software has been used to successfully design and create billions of chips and systems. The company is headquartered in Mountain View, California, and has approximately 90 offices located throughout the world.


About Maxonic:

Since 2002 Maxonic has been at the forefront of connecting candidate strengths to client challenges.  Our award winning, dedicated team of recruiting professionals are specialized by technology, are great listeners, and will seek to find a position that meets the long-term career needs of our candidates.  We take pride in the over 5,000 candidates that we have placed, and the repeat business that we earn from our satisfied clients.


Interested in Applying?

We can’t wait to see your resume!  Please apply below with your most current resume and anything else you’d like us to know about you – commute preferences, desired work environments, etc.  We promise to get back to you within 24 hours.  You should also feel free to email Lydia Vasilyeva ( or call 408-739-4900 x 113.


Keywords:  FPGA, RTL